The present invention relates generally to interfaces between data processors and their memories and more specifically to a programmable interface between a block floating point processor and its memory which allows signal processing to be accomplished in real-time.
Many radar systems routinely follow a heirarchy of real-time decisions in a progression from searching for targets to actual data collection. This hierarchy or chain of decisions is normally accomplished in the following order: search for targets, verification of echo return, target acquisition and tracking, target identification, and data collection.
In order to successfully complete the chain of decisions, radar systems must make decisions by processing data from target echo returns using algorithms in real-time. The processing of data is accomplished by an array processor which has an interface with a batch memory. The batch memory receives radar data from the radar receiver, and the interface transfers data from the batch memory to the array processor where some algorithm is applied to it.
After the array processor applies some decision-making algorithm to the radar data, the interface transfers the result back to the batch memory. The sequence of data transfers is a sequence of FETCH and STORE vector addresses.
However, data that is to be stored back into the batch memory can have varying exponent scales. To use these data for subsequent calculations in the array processor, one of the following conditions must occur: either the array processor must be capable of accommodating data having varying exponent scales, or else some means must be provided to normalize the effective exponents of the new swath over the entire swath.
Block Floating Point processors do not lend themselves to real-time problems since they possess an exponent normalization problem. That is, they are not capable of accommodating data having varying exponent scales. This inherent limitation of Block Floating Point processors suggests that they are not suitable as a general array processor in a radar tracking system since they would be unable to respond to real-time problems without a solution to the exponent normalization problem.
On review of the foregoing discussion, it is apparent that there currently exists the need for providing some means of giving any Block Floating Point processor the capability of performing various real-time signal processing algorithms on collected radar data stored in a radar system's batch memory. The present invention is directed toward satisfying that need.